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DISCRETE SEMICONDUCTORS
DATA SHEET
BSP205 P-channel enhancement mode vertical D-MOS transistor
Product specification File under Discrete Semiconductors, SC13b April 1995
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistor
DESCRIPTION P-channel enhancement mode vertical D-MOS transistor in a miniature SOT223 envelope and intended for use in relay, high-speed and line-transformer drivers. FEATURES * Very low RDS(on) * Direct interface to C-MOS, TTL, etc. * High-speed switching * No secondary breakdown PINNING - SOT223 1 = gate 2 = drain 3 = source 4 = drain PIN CONFIGURATION Marking code BSP205 QUICK REFERENCE DATA Drain-source voltage Drain current (DC) Drain-source ON-resistance -ID = 200 mA; -VGS = 10 V Gate threshold voltage RDS(on) -VGS(th) max. max. -VDS -ID max. max.
BSP205
60 V 275 mA 10 3.5 V
handbook, halfpage
4
d
g 1 Top view 2 3
MAM121
s
Fig.1 Simplified outline and symbol.
April 1995
2
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistor
RATINGS Limiting values in accordance with the Absolute Maximum System (IEC 134) Drain-source voltage Gate-source voltage (open drain) Drain current (DC) Drain current (peak) Total power dissipation up to Tamb = 25 C (note 1) Storage temperature range Junction temperature THERMAL RESISTANCE From junction to ambient (note 1) Note Rth j-a = -VDS VGSO -ID -IDM Ptot Tstg Tj max. max. max. max. max. max.
BSP205
60 V 20 V 275 mA 550 mA 1.5 W 150 C
-65 to 150 C
83.3 K/W
1. Device mounted on an epoxy printed-circuit board 40 mm x 40 mm x 1.5 mm; mounting pad for the drain lead min. 6 cm2.
April 1995
3
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistor
CHARACTERISTICS Tj = 25 C unless otherwise specified Drain-source breakdown voltage -ID = 10 A; VGS = 0 Drain-source leakage current -VDS = 48 V; VGS = 0 Gate-source leakage current VGS = 20 V; VDS = 0 Gate threshold voltage -ID = 1 mA; VDS = VGS Drain-source ON-resistance -ID = 200 mA ; -VGS = 10 V Transfer admittance -ID = 200 mA; -VDS = 15 V Input capacitance at f = 1 MHz; -VDS = 10 V; VGS = 0 Output capacitance at f = 1 MHz; -VDS = 10 V; VGS = 0 Feedback capacitance at f = 1 MHz; -VDS = 10 V; VGS = 0 Switching times (see Figs 2 and 3) -ID = 200 mA; -VDD = 50 V; -VGS = 0 to 10 V ton typ. max. typ. max. Crss typ. max. Coss typ. max. Ciss typ. max. Yfs min. typ. RDS(on) typ. max. -VGS(th) min. max. IGSS max. -IDSS max. -V(BR)DSS min.
BSP205
60 V 1.0 A 100 nA 1.5 V 3.5 V 7.5 10 60 125 mS mS
30 pF 45 pF
20 pF 30 pF
5 pF 10 pF
3 ns 6 ns 10 ns 15 ns
toff
April 1995
4
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistor
BSP205
handbook, halfpage
VDD = -50 V
handbook, halfpage
10 %
INPUT 90 %
0V -10 V ID 50
MBB689
10 % OUTPUT 90 % ton toff
MBB690
Fig.2 Switching time test circuit.
Fig.3 Input and output waveforms.
-103 handbook, halfpage
MDA741
VGS = -10 V -7.5 V -6 V -5 V
handbook, halfpage
-0.8 ID (A) -0.6
MDA751
ID (mA)
-102 -4.5 V
-0.4
-0.2
-10
6
8
10
12
14
16 18 RDSon ()
0 0
-2
-4
-6
-8 -10 VGS (V)
Fig.4
ON-resistance as a function of drain current; Tj = 25 C; typical values.
Fig.5
Transfer characteristics; -VDS = 10 V; Tj = 25 C; typical values.
April 1995
5
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistor
BSP205
handbook, halfpage
-0.8 ID (A) -0.6
MDA752
handbook,
2
MBB693
Ptot (W) 1.6
VGS = -10 V -7.5 V
1.2
-0.4 -6 V 0.8
-0.2
-5 V -4.5 V 0.4
0 0
-2
-4
-6
-8 -10 VDS (V)
0 0 50 100 150 200 Tamb (C)
Fig.6
Output characteristics; Tj = 25 C; typical values.
Fig.7 Power derating curve.
handbook, halfpage
3
MDA753
handbook, halfpage
1.2 k
MDA754
k 2.5
1.1
2
1
1.5
0.9
1
0.8
0.5 -50
0
50
100
Tj (C)
150
0.7 -50
0
50
100
Tj (C)
150
Fig.8 R DS ( on ) at T j k = ---------------------------------------------- ; R DS ( on ) at 25 C at -200 mA/-10 V; typical values.
Fig.9 - V GS ( th ) at T j k = ----------------------------------------------- ; - V GS ( th ) at 25 C -VGS(th) at -1 mA; typical values.
April 1995
6
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistor
BSP205
handbook, halfpage
80
MDA755
C (pF) 60
40 Ciss 20 Coss Crss 0 0 -5 -10 -15 -20 -25 VDS (V)
Fig.10 Tj = 25 C; VGS = 0; f = 1 MHz; typical values.
April 1995
7
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistor
PACKAGE OUTLINE Plastic surface mounted package; collector pad for good heat transfer; 4 leads
BSP205
SOT223
D
B
E
A
X
c y HE b1 vMA
4
Q A A1
1
e1 e
2
bp
3
wM B detail X
Lp
0
2 scale
4 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 1.8 1.5 A1 0.10 0.01 bp 0.80 0.60 b1 3.1 2.9 c 0.32 0.22 D 6.7 6.3 E 3.7 3.3 e 4.6 e1 2.3 HE 7.3 6.7 Lp 1.1 0.7 Q 0.95 0.85 v 0.2 w 0.1 y 0.1
OUTLINE VERSION SOT223
REFERENCES IEC JEDEC EIAJ
EUROPEAN PROJECTION
ISSUE DATE 96-11-11 97-02-28
April 1995
8
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistor
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS
BSP205
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
April 1995
9
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistor
NOTES
BSP205
April 1995
10
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistor
NOTES
BSP205
April 1995
11
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For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1997
Internet: http://www.semiconductors.philips.com
SCA54
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
137107/1200/01/pp12
Date of release: April 1995
Document order number:
9397 750 02479

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